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Core/Core/Src/main.c
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312
Core/Core/Src/main.c
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file : main.c
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* @brief : Main program body
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2023 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "cmsis_os.h"
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#include "dma.h"
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#include "lwip.h"
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#include "memorymap.h"
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#include "usart.h"
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#include "gpio.h"
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#include "fmc.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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#include "os_init.h"
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#include "g_init.h"
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN PTD */
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extern NAND_HandleTypeDef hnand1;
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#define NAND_PAGE_SIZE 2048 // ??????(??)
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#define NAND_OOB_SIZE 64 // OOB ??(??)
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#define NAND_BLOCK_SIZE 64 // ?? 64 ?(???)
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// ????????(????,???? SRAM3 ? DTCM)
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__attribute__((aligned(4))) uint8_t nand_write_buffer[NAND_PAGE_SIZE];
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__attribute__((aligned(4))) uint8_t nand_read_buffer[NAND_PAGE_SIZE + NAND_OOB_SIZE];
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/* USER CODE END PTD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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void SystemClock_Config(void);
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static void MPU_Config(void);
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void MX_FREERTOS_Init(void);
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/**
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* @brief The application entry point.
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* @retval int
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*/
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int main(void)
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{
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/* USER CODE BEGIN 1 */
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do
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{
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*(__IO uint32_t *)0XE000EF9C = 1UL << 2;
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} while (0); /* Cache??? */
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/* USER CODE END 1 */
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/* MPU Configuration--------------------------------------------------------*/
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MPU_Config();
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/* Enable the CPU Cache */
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/* Enable I-Cache---------------------------------------------------------*/
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SCB_EnableICache();
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/* Enable D-Cache---------------------------------------------------------*/
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SCB_EnableDCache();
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/* MCU Configuration--------------------------------------------------------*/
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/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
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HAL_Init();
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/* USER CODE BEGIN Init */
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SCB->CACR |= 1 << 2;
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/* USER CODE END Init */
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/* Configure the system clock */
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SystemClock_Config();
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/* USER CODE BEGIN SysInit */
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/* USER CODE END SysInit */
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/* Initialize all configured peripherals */
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MX_GPIO_Init();
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MX_DMA_Init();
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MX_USART1_UART_Init();
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MX_USART3_UART_Init();
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MX_USART6_UART_Init();
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/* USER CODE BEGIN 2 */
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MX_DMA_Init();
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g_Init();
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Os_Init();
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/* USER CODE END 2 */
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/* Call init function for freertos objects (in cmsis_os2.c) */
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MX_FREERTOS_Init();
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/* Start scheduler */
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osKernelStart();
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/* We should never get here as control is now taken by the scheduler */
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/* Infinite loop */
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/* USER CODE BEGIN WHILE */
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while (1)
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{
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/* USER CODE END WHILE */
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/* USER CODE BEGIN 3 */
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}
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/* USER CODE END 3 */
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}
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/**
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* @brief System Clock Configuration
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* @retval None
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*/
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void SystemClock_Config(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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/** Supply configuration update enable
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*/
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HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
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/** Configure the main internal regulator output voltage
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*/
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
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__HAL_RCC_SYSCFG_CLK_ENABLE();
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
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while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = 5;
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RCC_OscInitStruct.PLL.PLLN = 192;
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RCC_OscInitStruct.PLL.PLLP = 2;
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RCC_OscInitStruct.PLL.PLLQ = 2;
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RCC_OscInitStruct.PLL.PLLR = 2;
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RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
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RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
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RCC_OscInitStruct.PLL.PLLFRACN = 0;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
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{
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Error_Handler();
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}
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
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|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
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|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
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RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
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{
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Error_Handler();
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}
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}
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/* USER CODE BEGIN 4 */
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/* USER CODE END 4 */
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/* MPU Configuration */
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void MPU_Config(void)
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{
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MPU_Region_InitTypeDef MPU_InitStruct = {0};
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/* Disables the MPU */
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HAL_MPU_Disable();
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/** Initializes and configures the Region and the memory to be protected
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*/
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MPU_InitStruct.Enable = MPU_REGION_ENABLE;
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MPU_InitStruct.Number = MPU_REGION_NUMBER0;
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MPU_InitStruct.BaseAddress = 0x30040000;
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MPU_InitStruct.Size = MPU_REGION_SIZE_256B;
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MPU_InitStruct.SubRegionDisable = 0x0;
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MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
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MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
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MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
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MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
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MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
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MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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/** Initializes and configures the Region and the memory to be protected
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*/
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MPU_InitStruct.Number = MPU_REGION_NUMBER1;
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MPU_InitStruct.BaseAddress = 0x30044000;
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MPU_InitStruct.Size = MPU_REGION_SIZE_16KB;
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MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
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MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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/* Enables the MPU */
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HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
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}
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/**
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* @brief Period elapsed callback in non blocking mode
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* @note This function is called when TIM7 interrupt took place, inside
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* HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
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* a global variable "uwTick" used as application time base.
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* @param htim : TIM handle
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* @retval None
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*/
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void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
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{
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/* USER CODE BEGIN Callback 0 */
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/* USER CODE END Callback 0 */
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if (htim->Instance == TIM7) {
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HAL_IncTick();
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}
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/* USER CODE BEGIN Callback 1 */
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/* USER CODE END Callback 1 */
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}
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/**
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* @brief This function is executed in case of error occurrence.
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* @retval None
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*/
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void Error_Handler(void)
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{
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/* USER CODE BEGIN Error_Handler_Debug */
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/* User can add his own implementation to report the HAL error return state */
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__disable_irq();
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while (1)
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{
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}
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/* USER CODE END Error_Handler_Debug */
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}
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#ifdef USE_FULL_ASSERT
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/**
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* @brief Reports the name of the source file and the source line number
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* where the assert_param error has occurred.
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* @param file: pointer to the source file name
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* @param line: assert_param error line source number
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* @retval None
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*/
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void assert_failed(uint8_t *file, uint32_t line)
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{
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/* USER CODE BEGIN 6 */
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/* User can add his own implementation to report the file name and line number,
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ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
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/* USER CODE END 6 */
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}
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#endif /* USE_FULL_ASSERT */
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